Infineon NOR 64Mbit SPI Flash Memory 8-Pin SOIC, S25FL064LABMFI013
- RS Stock No.:
- 215-5783P
- Mfr. Part No.:
- S25FL064LABMFI013
- Brand:
- Infineon
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Subtotal 530 units (supplied in a tube)*
HK$4,452.00
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In Stock
- Plus 890 unit(s) shipping from 15 December 2025
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Units | Per unit |
|---|---|
| 530 - 1040 | HK$8.40 |
| 1050 + | HK$8.22 |
*price indicative
- RS Stock No.:
- 215-5783P
- Mfr. Part No.:
- S25FL064LABMFI013
- Brand:
- Infineon
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Infineon | |
| Memory Size | 64Mbit | |
| Interface Type | SPI | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Organisation | 8 M x 8 | |
| Mounting Type | Surface Mount | |
| Cell Type | NOR | |
| Minimum Operating Supply Voltage | 2.7 V | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Block Organisation | Symmetrical | |
| Length | 5.28mm | |
| Height | 1.9mm | |
| Width | 5.28mm | |
| Dimensions | 5.28 x 5.28 x 1.9mm | |
| Maximum Random Access Time | 8ns | |
| Number of Bits per Word | 8bit | |
| Automotive Standard | AEC-Q100 | |
| Series | S25FL | |
| Maximum Operating Temperature | +85 °C | |
| Number of Words | 8MB | |
| Minimum Operating Temperature | -40 °C | |
| Select all | ||
|---|---|---|
Brand Infineon | ||
Memory Size 64Mbit | ||
Interface Type SPI | ||
Package Type SOIC | ||
Pin Count 8 | ||
Organisation 8 M x 8 | ||
Mounting Type Surface Mount | ||
Cell Type NOR | ||
Minimum Operating Supply Voltage 2.7 V | ||
Maximum Operating Supply Voltage 3.6 V | ||
Block Organisation Symmetrical | ||
Length 5.28mm | ||
Height 1.9mm | ||
Width 5.28mm | ||
Dimensions 5.28 x 5.28 x 1.9mm | ||
Maximum Random Access Time 8ns | ||
Number of Bits per Word 8bit | ||
Automotive Standard AEC-Q100 | ||
Series S25FL | ||
Maximum Operating Temperature +85 °C | ||
Number of Words 8MB | ||
Minimum Operating Temperature -40 °C | ||
The Cypress Semiconductor FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO), and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock.
Serial Peripheral Interface (SPI) with Multi-I/O
Read
Program Architecture
Erase Architecture
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Security Features
Read
Program Architecture
Erase Architecture
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Security Features